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Items where Subject is "T Technology > TK Electrical engineering. Electronics. Nuclear engineering > TK7800 Electronics > TK7874 Microelectronics. Integrated circuits"

Group by: Creator's name | Item Type | Date | No Grouping
Number of items at this level: 7.

2019

Khalid, Ahmad, Saha, Sangeet, Bhatt, Bina, Gu, Dongbing, Howells, Gareth, McDonald-Maier, Klaus D. (2019) FLAG: A Framework for FPGA Based Load Generator in Profinet Communication. In: International Conference on Industry 4.0 and Artificial Intelligence Technologies, 19-22 Aug 2019, Cambridge, UK. (Unpublished) (Access to this publication is currently restricted. You may be able to access a copy if URLs are provided) (KAR id:74065)
Format: PDF

2015

Medina, Jose Cadenas (2015) Pipelined median architecture. Electronics Letters, 51 (24). pp. 1999-2001. ISSN 0013-5194. (doi:10.1049/el.2015.1898) (KAR id:57351)
Format: PDF

Medina, Jose Cadenas, Megson, G. M., Sherratt, Simon (2015) Median architecture by accumulative parallel counters. IEEE Transactions on Circuits and Systems II, Express Briefs, 62 (7). pp. 661-665. ISSN 1549-7747. E-ISSN 1558-3791. (doi:10.1109/TCSII.2015.2415655) (KAR id:57353)
Format: PDF

Mouli, Surej, Palaniappan, Ramaswamy, Sillitoe, Ian P., Gan, John Q. (2015) Quantification of SSVEP responses using multi-chromatic LED stimuli: Analysis on colour, orientation and frequency. In: Computer Science and Electronic Engineering Conference (CEEC). 7th Computer Science and Electronic Engineering Conference. . pp. 93-98. (doi:10.1109/CEEC.2015.7332706) (KAR id:56172)
Format: PDF

2014

Medina, Jose Cadenas, Megson, G. M. (2014) Rapid preconditioning of data for accelerating convex hull algorithms. Electronics Letters, 50 (4). pp. 270-272. ISSN 0013-5194. E-ISSN 1350-911X. (doi:10.1049/el.2013.3507) (KAR id:57356)
Format: PDF

Mouli, Surej, Palaniappan, Ramaswamy, Sillitoe, Ian P. (2014) Arduino based configurable LED stimulus design for multi-frequency SSVEP-BCI. In: Proceedings of the IEEE EMBS UKRI Postgraduate Conference on Biomedical Engineering. . (KAR id:56173)
Format: PDF

2013

Megson, G.M., Cadenas, J.O., Sherratt, R.S., Huerta, P., Kao, W.C. (2013) A parallel quantum histogram architecture. IEEE Transactions on Circuits and Systems II, Express Briefs, 60 (7). pp. 437-441. ISSN 1549-7747. E-ISSN 1558-3791. (doi:10.1109/TCSII.2013.2258263) (KAR id:57358)
Format: PDF

This list was generated on Sat Dec 21 22:18:35 2024 GMT.