A study of current transport across metal to clean silicon interfaces

A detailed study has been made into the current transport across metal to clean silicon interfaces. The metals considered for the experimental work were gold, chromium, silver and aluminium. The experimental procedure involved the deposition of the metal film onto the clean silicon surface under ultra-high vacuum ( U .H . V .) conditions. Two techniques were used for the attainment of a clean silicon surface. Epitaxial layers were deposited by sublimation under U . H . V . conditions onto heat cleaned substrates and also a straight forward heat cleaning treatment was used in order to produce the required surface. In each case the U . H . V . heat cleaning treatment involved resistively heating the substrate to a temperature of 1200°C for 5 minutes. This technique was essential to the epitaxial layer deposition in order to remove the oxide layer and other contamination and to eliminate any interfacial layer when just considering the heat cleaned surfaces. Cleaving under U . H . V . conditions was considered doubtful due to the residual strain which might distort the surface region. Due to the fact that intimate metal-silicon contacts are being considered the conventional surface state analysis is definitely not the most applicable in this case. A theoretical model has been developed based on the effects of metal quantum states decaying into the band-gap of the semiconductor. These states are known as quantum tails. A comprehensive data analysis technique has been used which indicates good agreement between the experimental barrier heights, for both interface formation techniques, and the potential profile in the depletion layer predicted by the model. The variation of barrier height with the various metals used can be explained in terms of the density and distribution of the metal induced surface states in the semiconductor band-gap. Finally the departures of the current- voltage characteristics from the usual approximation of thermionic emission can be explained in terms of the variation of the effective barrier height under differing bias conditions. This effect can be seen to be due to the variations of the charge in the quantum tails under varying bias conditions. To the author's knowledge this is the first time that data has been reported for metal contacts onto epitaxial silicon layers. Also good correlation has been achieved with the results from the two surface preparation methods. Further work of interest has been considered with a view to refining the experimental procedure and hopefully producing a more comprehensive understanding of the behaviour at the interface.