Investigations of the staircase memristor model and applications of memristor-based local connections

The memristor is postulated by Chua (IEEE Trans Circuit Theory, 18(5):507–519, 1971) as the fourth fundamental passive circuit element and experimentally validated by HP labs in 2008. It is an emerging device in nano technology that provides low power consumption as well as high density. In this paper, the staircase memristor model is discussed and investigated with the HP memristor model. By connecting HP memristor models in series or parallel, a staircase memristor model could be constructed and demonstrate staircase behavior. By comparing the staircase memristor model to the general HP memristor model, distinctions between them are demonstrated and this lends themselves to different applications. Further to the memristor-based cellular neural network (CNN), the structure is modified and applied to the echo state network (ESN) where memristors are used as local connections. By this means, the ESN benefits from the simple structure, non-volatility and low power feature of memristors and therefore the complexity and size of the original ESN architecture can be reduced. Meanwhile, the simpler structure still has satisfactory performance in applications compared with the original ESN.