Analogue IC Layout Synthesis Using Symbolic Floorplans
Nalbantis, D. and Waller, Winston A.J. and Walczowski, Les T. and Shi, K.
(1996)
Analogue IC Layout Synthesis Using Symbolic Floorplans.
In:
3rd International conference on concurrent engineering and electronic design automation.
SCS, San Diego, California, USA, pp. 175-177.
ISBN 1-56555-095-1.
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(KAR id:49996)
The full text of this publication is not currently available from this repository. You may be able to access a copy if URLs are provided.
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