Analogue IC Layout Synthesis Using Symbolic Floorplans

Nalbantis, D., Waller, Winston A.J., Walczowski, Les T., Shi, K. (1996) Analogue IC Layout Synthesis Using Symbolic Floorplans. In: Proc. 3rd International Conference on Concurrent Engineering & Electronic Design Automation. . pp. 175-177. ISBN 1-56555-095-1. (The full text of this publication is not currently available from this repository. You may be able to access a copy if URLs are provided)

The full text of this publication is not currently available from this repository. You may be able to access a copy if URLs are provided. (Contact us about this Publication)
Item Type: Conference or workshop item (Paper)
Subjects: T Technology
Divisions: Faculties > Sciences > School of Engineering and Digital Arts > Digital Media
Depositing User: Tina Thompson
Date Deposited: 03 Aug 2015 10:40 UTC
Last Modified: 29 May 2019 14:58 UTC
Resource URI: https://kar.kent.ac.uk/id/eprint/49996 (The current URI for this page, for reference purposes)
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