Nalbantis, D. and Waller, Winston A.J. and Walczowski, Les T. and Shi, K. (1996) Analogue IC Layout Synthesis Using Symbolic Floorplans. In: 3rd International conference on concurrent engineering and electronic design automation. SCS, San Diego, California, USA, pp. 175-177. ISBN 1-56555-095-1. (The full text of this publication is not currently available from this repository. You may be able to access a copy if URLs are provided) (KAR id:49996)
| The full text of this publication is not currently available from this repository. You may be able to access a copy if URLs are provided. |
| Item Type: | Book section |
|---|---|
| Subjects: | T Technology |
| Institutional Unit: | Schools > School of Engineering, Mathematics and Physics > Engineering |
| Former Institutional Unit: |
Divisions > Division of Computing, Engineering and Mathematical Sciences > School of Engineering and Digital Arts
|
| Depositing User: | Tina Thompson |
| Date Deposited: | 03 Aug 2015 10:40 UTC |
| Last Modified: | 20 May 2025 10:39 UTC |
| Resource URI: | https://kar.kent.ac.uk/id/eprint/49996 (The current URI for this page, for reference purposes) |
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