Implementation of the Veritas Design Logic

Hanna, Keith and Daeche, Neil and Howells, Gareth (1992) Implementation of the Veritas Design Logic. In: International Conference On Theorem Provers in Circuit Design : Theory, Practice And Experience. IFIP Transactions A-Computer Science and Technology, 10 . Elsevier Science, Nijmegen, Netherlands, pp. 77-94. ISBN 0-444-89686-4. (The full text of this publication is not currently available from this repository. You may be able to access a copy if URLs are provided) (KAR id:22608)

The full text of this publication is not currently available from this repository. You may be able to access a copy if URLs are provided.
Official URL: https://dl.acm.org/citation.cfm?id=672785

Abstract

Veritas is a design logic that provides dependent types and subtypes. It is implemented within the functional programming language Haskell. Interesting aspects of this implementation, in particular those relating to dependent types, to the representation of terms and signatures, to syntactic variants (controlled by attributes) and to a concrete notation for derivations are discussed.

Item Type:	Book section
Uncontrolled keywords:	Design Logic; Dependent Types; Implementation
Subjects:	Q Science > QA Mathematics (inc Computing science) > QA 75 Electronic computers. Computer science
Divisions:	Divisions > Division of Computing, Engineering and Mathematical Sciences > School of Computing
Depositing User:	P. Ogbuji
Date Deposited:	08 Sep 2009 08:38 UTC
Last Modified:	16 Nov 2021 10:01 UTC
Resource URI:	https://kar.kent.ac.uk/id/eprint/22608 (The current URI for this page, for reference purposes)

University of Kent Author Information

Hanna, Keith.

Creator's ORCID:
CReDIT Contributor Roles:

Howells, Gareth.

Creator's ORCID:	https://orcid.org/0000-0001-5590-0880
CReDIT Contributor Roles:

Depositors only (login required):

Download Statistics

Total unique views for this document in KAR since July 2020. For more details click on the image.