Lins, Rafael D. (1991) A Shared Memory Architecture for Parallel Cyclic Reference Counting. Microprocessing and Microprogramming, 35 (1-5). pp. 563-568. ISSN 0165-6074. (doi:10.1016/0165-6074(91)90322-K) (The full text of this publication is not currently available from this repository. You may be able to access a copy if URLs are provided) (KAR id:22348)
The full text of this publication is not currently available from this repository. You may be able to access a copy if URLs are provided. | |
Official URL: http://dx.doi.org/10.1016/0165-6074(91)90322-K |
Abstract
In this paper we generalise a shared memory architecture based on reference counting to allow multiple mutators and collectors share the same workspace. This generalisation is simple and keeps the properties of the one-mutator-one-collector architecture.
Item Type: | Article |
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DOI/Identification number: | 10.1016/0165-6074(91)90322-K |
Uncontrolled keywords: | parallel cyclic reference counting, multi-processor shared memory architecture |
Subjects: | Q Science > QA Mathematics (inc Computing science) > QA 75 Electronic computers. Computer science |
Divisions: | Divisions > Division of Computing, Engineering and Mathematical Sciences > School of Computing |
Depositing User: | M. Nasiriavanaki |
Date Deposited: | 29 Aug 2009 17:02 UTC |
Last Modified: | 05 Nov 2024 10:01 UTC |
Resource URI: | https://kar.kent.ac.uk/id/eprint/22348 (The current URI for this page, for reference purposes) |
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