A Model Driven Development Approach to Mapping UML State Diagrams to Synthesizable VHDL

With the continuing rise in the complexity of embedded systems, there is an emerging need for a higher level modeling environment that facilitates efficient handling of this complexity. The aim here is to produce such a high-level environment using Model-Driven Development ( MDD) techniques that map a high-level abstract description of an electronic embedded system into its low-level implementation details. The Unified Modeling Language (UML) is a high-level graphical- based language that is broad enough in scope to model embedded systems hardware circuits. The authors have developed a framework for deriving Very High Speed Integrated Circuit Hardware Description Language ( VHDL) code from UML state diagrams and defined a set of rules that enable automated generation of synthesizable VHDL code from UML specifications using MDD techniques. By adopting the techniques and tools described in this paper, the design and implementation of complex state-based systems is greatly simplified.