A 3.23 GOPS Parallel Architecture for Digital Image Pre-Processing

McBader, Stephanie and Lee, Peter A 3.23 GOPS Parallel Architecture for Digital Image Pre-Processing. In: IASTED International Conference on Signal Processing, Pattern Recognition and Applications Conference SPPRA 2002, 2002 June 25-28, Crete, Greece . (The full text of this publication is not currently available from this repository. You may be able to access a copy if URLs are provided)

The full text of this publication is not available from this repository. (Contact us about this Publication)
Item Type: Conference or workshop item (Paper)
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800 Electronics (see also: telecommunications)
Divisions: Faculties > Science Technology and Medical Studies > School of Engineering and Digital Arts
Depositing User: Yiqing Liang
Date Deposited: 29 Jun 2011 13:41
Last Modified: 23 Jun 2014 10:00
Resource URI: https://kar.kent.ac.uk/id/eprint/7202 (The current URI for this page, for reference purposes)
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