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Formally verifying Exceptions for Low-level code with Separation Logic

Marco, Paviotti, Jesper, Bengtson (2018) Formally verifying Exceptions for Low-level code with Separation Logic. Journal of Logical and Algebraic Methods in Programming, 94 . pp. 1-14. ISSN 2352-2208. (doi:10.1016/j.jlamp.2017.09.004)


Exceptions in low-level architectures are implemented as synchronous interrupts: upon the execution of a faulty instruction the processor jumps to a piece of code that handles the error. Previous work has shown that assembly programs can be written, verified and run using higher-order separation logic. However, execution of faulty instructions is then specified as either being undefined or terminating with an error. In this paper, we study synchronous interrupts and show their usefulness by implementing a memory allocator. This shows that it is indeed possible to write positive specifications of programs that fault. All of our results are mechanised in the interactive proof assistant Coq.

Item Type: Article
DOI/Identification number: 10.1016/j.jlamp.2017.09.004
Uncontrolled keywords: Formal Verification, Separation Logic, Assembly, Coq, Exceptions, Step-indexed models, Interactive Theorem Proving
Subjects: Q Science > QA Mathematics (inc Computing science) > QA 76 Software, computer programming,
Divisions: Faculties > Sciences > School of Computing > Programming Languages and Systems Group
Depositing User: Marco Paviotti
Date Deposited: 19 Oct 2018 12:13 UTC
Last Modified: 16 Aug 2019 15:40 UTC
Resource URI: (The current URI for this page, for reference purposes)
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