A Leaf-cell Generator for Silicon Compilers

de Abreu Moreira, Dilvan, Walczowski, Les T. (1995) A Leaf-cell Generator for Silicon Compilers. SIGPLAN OOPS Messenger, 6 (3). pp. 50-51. ISSN 1055-6400. (doi:10.1145/219260.219267) (The full text of this publication is not currently available from this repository. You may be able to access a copy if URLs are provided)

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Official URL
http://doi.acm.org/10.1145/219260.219267

Abstract

A program for the design of leaf cells for silicon compilers of digital VLSI (Very Large Scale Integrated) circuits, is being developed. This program uses rule based reasoning and genetic algorithmic search techniques, whenever each is appropriate. Leaf cells are subcircuits of a complexity comparable with SSI (Small Scale Integration) components such as one-bit adders, flip-flops or multiplexers. They typically contain between 10 to 100 transistors. Silicon compilers can use libraries of ready designed leaf cells or each leaf cell can be automatically generated [1] by synthesis tools such as the program we are developing. The main advantage of the synthesis approach is that circuit performance will not be sacrificed since a new, optimal layout will be produced whatever the complexity of the circuit and whenever the fabrication process is upgraded.

Item Type: Article
DOI/Identification number: 10.1145/219260.219267
Subjects: T Technology
Divisions: Faculties > Sciences > School of Engineering and Digital Arts > Digital Media
Depositing User: Tina Thompson
Date Deposited: 03 Aug 2015 10:57 UTC
Last Modified: 28 May 2019 14:04 UTC
Resource URI: https://kar.kent.ac.uk/id/eprint/50000 (The current URI for this page, for reference purposes)
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