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Device sizing for silicon compilers using CSL

Walczowski, Les T. and Smith, M.H. and Waller, Winston A.J. and Howard, D. (1991) Device sizing for silicon compilers using CSL. In: Proceedings of the IEEE 1991 Custom Integrated Circuits Conference. IEEE. ISBN 0-7803-0015-7. (doi:10.1109/CICC.1991.164063) (The full text of this publication is not currently available from this repository. You may be able to access a copy if URLs are provided) (KAR id:49915)

The full text of this publication is not currently available from this repository. You may be able to access a copy if URLs are provided. (Contact us about this Publication)
Official URL
http://dx.doi.org/10.1109/CICC.1991.164063

Abstract

The authors present an overview of a system designed to generate integrated circuits so that they meet their performance specifications. The system is based around CSL (Circuit Specification Language), an object-oriented language designed specifically for the purpose of generating integrated circuits. The usefulness of CSL in calculating the size of transistors in the circuit so that they meet the specification is discussed. This is the task for which CSL was originally designed but it is believed that it will prove capable of handling all stages of silicon compilation

Item Type: Book section
DOI/Identification number: 10.1109/CICC.1991.164063
Uncontrolled keywords: circuit simulation; object oriented modeling; libraries; laboratories; design automation; silicon compiler; specification languages; integrated cicruit layout; capacitance; logic gates
Subjects: T Technology
Divisions: Faculties > Sciences > School of Engineering and Digital Arts > Digital Media
Depositing User: Tina Thompson
Date Deposited: 30 Jul 2015 14:04 UTC
Last Modified: 01 Aug 2019 08:07 UTC
Resource URI: https://kar.kent.ac.uk/id/eprint/49915 (The current URI for this page, for reference purposes)
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