Exploring Garbage Collection with Haswell Hardware Transactional Memory

Ritson, Carl G. and Ugawa, Tomoharu and Jones, Richard E. (2014) Exploring Garbage Collection with Haswell Hardware Transactional Memory. In: ACM/SIGPLAN International Symposium on Memory Management (ISMM14), 12 June 2014, Edinburgh, UK. (doi:https://doi.org/10.1145/2602988.2602992) (Full text available)

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http://dx.doi.org/10.1145/2602988.2602992

Abstract

Intel’s latest processor microarchitecture, Haswell, adds support for a restricted form of transactional memory to the x86 programming model. We explore how this can be applied to three garbage collection scenarios in Jikes RVM: parallel copying, concurrent copying and bitmap marking. We demonstrate gains in concurrent copying speed over traditional synchronisation mechanisms of 48–101%. We also show how similar but portable performance gains can be achieved through software transactional memory techniques. We identify the architectural overhead of capturing sufficient work for transactional execution as a major stumbling block to the effective use of transactions in the other scenarios.

Item Type: Conference or workshop item (Paper)
Projects: [UNSPECIFIED] MirrorGC: Garbage Collection for Multicore Systems
Uncontrolled keywords: Garbage Collection; Transactional Memory; Java; Jikes RVM
Subjects: Q Science > QA Mathematics (inc Computing science) > QA 75 Electronic computers. Computer science
Q Science > QA Mathematics (inc Computing science) > QA 76 Software, computer programming, > QA76.76 Computer software
T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800 Electronics (see also: telecommunications) > TK7880 Applications of electronics (inc industrial & domestic) > TK7885 Computer engineering
Divisions: Faculties > Sciences > School of Computing > Programming Languages and Systems Group
Depositing User: Richard Jones
Date Deposited: 23 Apr 2014 13:49 UTC
Last Modified: 10 Feb 2016 12:59 UTC
Resource URI: https://kar.kent.ac.uk/id/eprint/40819 (The current URI for this page, for reference purposes)
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