A Generally Configurable Multigrid Implementation for Transputer Networks

This paper describes the performance of a multigrid method implemented on a transputer-based architecture. We show that the combination of fast floating-point hardware, local memory and fast communication links between processors provide an excellent environment for the parallel implementation of multigrid algorithms. The gain in efficiency obtained by increasing the number of processors is shown to be nearly linear and comparisons are made with published figures for a parallel multigrid Poisson solver on an Intel iPSC 32-node hypercube.