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W

Waller, Winston A.J. and Aziz, S.M. (1994) A C-Testable Parallel Multipler Using Differencial Casecode Voltage Swish (DCVS) Logic. In: Yanagawa, T. and Ivey, P.A., eds. VLSI 93 - IFIP Transactions A. Computer Science and Technology. North Holland, pp. 133-142. ISBN 0-444-89911-1. (The full text of this publication is not currently available from this repository. You may be able to access a copy if URLs are provided) (KAR id:20093)

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