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Waller, W.A.J. and Aziz, S.M. (1994) A C-Testable Parallel Multipler Using Differencial Casecode Voltage Swish (DCVS) Logic. In: IFIP TC10/WG10.5 International Conference on Very Large Scale Integration (VLSI 93), Grenoble, France. (The full text of this publication is not available from this repository)

This list was generated on Thu Apr 17 16:43:01 2014 BST.