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Number of items: 15.

2012

Vandenbussche, J.-J. and Lee, P. and Peuterman, J. (2012) Linear Phase Approximation of Real and Complex Pole IIR Filters using MFIR Structures. In: 5th European Confernce on the Use of Modern Information and Communication Technologies, 22-23rd March 2012, Gent, Belgium. (The full text of this publication is not available from this repository)

Yemiscioglu, Gurtac and Lee, P. (2012) 16-Bit Clocked Adiabatic Logic (CAL) Leading One Detector for a Logarithmic Signal Processor. In: Ph.D. Research in Microelectronics and Electronics (PRIME), 2012 8th Conference, 12-15 June 2012, Aachen, Germany . (The full text of this publication is not available from this repository)

2008

Nnolim, N. and Lee, P. (2008) A Review and Evaluation of Image Contrast Enhancement Algorithms based on Statistical Measures. In: 10th IASTED International Conference on Signal and Image Processing, 18-20th August, 2008, Kailua-Kona, Hawaii, USA. (The full text of this publication is not available from this repository)

Vandenbussche, J.-J. and Lee, P. and Peuteman, J. (2008) Analysis of Time and Frequency Domain Performance of MFIR Filters. In: ESA'08, 2008 International Conference on Embedded Systems and Applications, 14-17th July 2008, Las Vegas, USA. (The full text of this publication is not available from this repository)

Nnolim, U. and Lee, P. (2008) Homomorphic Filtering of Colour Images using a Spatial Filter Kernel in the HIS Colour Space. In: I1MTC2008 - IEEE International Instrumentation and Measurement Technology Conference, 12-15 May 2008, Victoria, Vancouver Island, Canada. (The full text of this publication is not available from this repository)

2007

Wisdom, M. and Lee, P. (2007) Evaluation of a Hybrid-Log 2D Wavelet Image Transform. In: IEEE DSP2007 15th International Conference on Digital Signal Processing, 2007 July 1-4, Cardiff , Wales. (The full text of this publication is not available from this repository)

Lee, P. (2007) A VLSI Implementation of a Digital Hybrid-LNS Neuron. In: International Symposium on Integrated Circuits, 2007 September 26-28, Singapore. (The full text of this publication is not available from this repository)

Wisdom, M. and Lee, P. (2007) An Efficient Implementation of a 2D DWT on FPGA. In: International Conference on Field Programmable Logic and Applications , 2007 September, Amsterdam. (The full text of this publication is not available from this repository)

Lee, P. (2007) An Estimation of Mismatch Error in IDCT Decoders Implemented with Hybrid-LNS Arithmetic. In: 15th European Signal Processing Conference (EUSIPCO 2007), 2007 September 3-7, Poznan, Poland. (The full text of this publication is not available from this repository)

Weston, J. and Lee, P. (2007) An Unbounded Parallel Binary Tree Adder for use on a Cellular Platform. In: IEEE Symposium on Artificial Life, 2007 April 1-5, Honolulu, Hawaii. (The full text of this publication is not available from this repository)

Lee, P. and Costa, E. and McBader, S. and Clementel, L. and Sartori, A. (2007) LogTOTEM: A Logarithmic Neural Processor and its Implementation on an FPGA Fabric. In: Neural Networks. International Joint Conference on, 2007, Orlando, FL,. (The full text of this publication is not available from this repository)

2006

Lee, P. and Sartori, A. and Tecchiolli, G. and Zorat, A. (2006) A parallel processor for neural networks. In: Commun Engineers, Japan, ed. 1995 IEEE Symposium on Vlsi Circuits. IEEE Press, Piscataway NJ, pp. 81-82. ISBN 0-7803-2599-0. (The full text of this publication is not available from this repository)

2003

McBader, S. and Lee, P. (2003) Reducing Memory Bottlenecks in Embedded, Parallel Image Processors. IEE Electronics Letters, 39 (1). pp. 33-35. ISSN 0013-5194. (The full text of this publication is not available from this repository)

McBader, S. and Lee, P. (2003) Reducing Memory Bottlenecks in Digital Image Processors. IEE Electronics Letters, 39 (1). pp. 33-35. ISSN 0013-5194. (The full text of this publication is not available from this repository)

1998

Lee, P. and Sartori, A. (1998) Modular leading one detector for logarithmic encoder. Electronics Letters, 34 (8). pp. 727-728. ISSN 0013-5194. (The full text of this publication is not available from this repository)

This list was generated on Mon Jun 23 10:23:58 2014 BST.