McBader, S. and Lee, P. and Sartori, A. (2004) The Impact of Modern FPGA Architectures on Neural Hardware: A Case Study of the TOTEM Neural Processor. In: Int. Joint Conf. on Neural Networks, Special Session on Dig. Imp. of Neural Nets - Invited Paper, 2004 July, Budapest, Hungary .
| The full text of this publication is not available from this repository. (Contact us about this Publication) | |
| Official URL http://dx.doi.org/10.1109/IJCNN.2004.1381178 |
Abstract
The implementation of neural processors in hardware is a very challenging task. However, recent advances in programmable architectures facilitate this task by providing the fundamental hardware blocks for building neural structures. Using the TOTEM neural processor as a case study, this paper reports on the main advantages of implementing neural hardware on programmable logic devices such as FPGAs.
| Item Type: | Conference or workshop item (Paper) |
|---|---|
| Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800 Electronics (see also: telecommunications) |
| Divisions: | Faculties > Science Technology and Medical Studies > School of Engineering and Digital Arts > Instrumentation, Control and Embedded Systems |
| Depositing User: | Yiqing Liang |
| Date Deposited: | 16 Aug 2009 19:48 |
| Last Modified: | 14 Jan 2010 14:32 |
| Resource URI: | http://kar.kent.ac.uk/id/eprint/8697 (The current URI for this page, for reference purposes) |
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