A Multiprocessor Shared Memory Architecture for Parallel Cyclic Reference Counting

Lins, R.D. (1992) A Multiprocessor Shared Memory Architecture for Parallel Cyclic Reference Counting. In: 18th Symposium On Microprocessing And Microprogramming ( Euromicro-92 ) : Software And Hardware : Specification And Design. Microprocessing And Microprogramming ( Euromicro-92 ) : Software And Hardware : Specification And Design, 35. Elsevier Science Bv, Paris, France pp. 563-568. (The full text of this publication is not available from this repository)

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Abstract

In this paper we generalise a shared memory architecture based on reference counting to allow multiple mutators and collectors share the same workspace. This generalisation is simple and keeps the properties of the one-mutator-one-collector architecture.

Item Type: Conference or workshop item (Paper)
Subjects: Q Science > QA Mathematics (inc Computing science) > QA 75 Electronic computers. Computer science
Divisions: Faculties > Science Technology and Medical Studies > School of Computing
Depositing User: M. Nasiriavanaki
Date Deposited: 29 Aug 2009 17:02
Last Modified: 29 Aug 2009 17:02
Resource URI: http://kar.kent.ac.uk/id/eprint/22348 (The current URI for this page, for reference purposes)
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