Parallel multilayer classifier architectures of increasing hierarchical order

Fairhurst, M.C. and Cowley, K.D. (1993) Parallel multilayer classifier architectures of increasing hierarchical order. Pattern Recognition Letters, 14 (2). pp. 141-145. ISSN 0167-8655. (The full text of this publication is not available from this repository)

The full text of this publication is not available from this repository. (Contact us about this Publication)
Official URL
http://dx.doi.org/10.1016/0167-8655(93)90087-T

Abstract

Multi-level classifier architectures provide a means of improving error-rate performance in many classification tasks such as machine printed or handwritten character recognition. It is argued that appropriate multi-level structures are well suited to parallel implementation, and results are presented to characterise the performance of such structures in a practical character recognition environment for a range of configurations and, in particular, for hierarchies of increasing order.

Item Type: Article
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800 Electronics (see also: telecommunications) > TK7880 Applications of electronics (inc industrial & domestic)
Q Science > QA Mathematics (inc Computing science) > QA 76 Software, computer programming,
Divisions: Faculties > Science Technology and Medical Studies > School of Engineering and Digital Arts > Image and Information Engineering
Depositing User: M. Nasiriavanaki
Date Deposited: 10 Aug 2009 08:02
Last Modified: 10 Aug 2009 08:02
Resource URI: http://kar.kent.ac.uk/id/eprint/22086 (The current URI for this page, for reference purposes)
  • Depositors only (login required):