Anzellotti, G. and Battiti, R. and Lazzizzera, I. and Soncini, G. and Zorat, A. and Sartori, A. and Tecchiolli, G. and Lee, P. (1995) Totem - a Highly Parallel Chip for Ttiggering Apllications with Inductive Learning Based on the Reactive Tabu Search. In: 4th International Workshop on Software Engineering, Artificial Intelligence, and Expert Systems for High Energy and Nuclear Physics (AIHENP 95), Pisa, Italy.
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The training of a Multi-Layer Perceptron (MLP) classifier is considered as a Combinatorial Optimization task and solved using the Reactive Tabu Search (RTS) method. RTS needs only forward passes (no derivatives) and does not require high precision network parameters. TOTEM, a special-purpose VLSI chip, was developed to take advantage of the limited memory and processing requirements of RTS: the final system effects a very close match between hardware and training algorithm. The RTS algorithm and the design of TOTEM are discussed, together with the operational characteristics of the VLSI chip and some preliminary training and generalization tests on triggering tasks.
|Item Type:||Conference or workshop item (Other)|
|Subjects:||Q Science > QA Mathematics (inc Computing science) > QA 75 Electronic computers. Computer science|
|Divisions:||Faculties > Science Technology and Medical Studies > School of Computing > Theoretical Computing Group|
|Depositing User:||P. Ogbuji|
|Date Deposited:||08 Jun 2009 18:40|
|Last Modified:||08 Jun 2009 18:40|
|Resource URI:||http://kar.kent.ac.uk/id/eprint/19673 (The current URI for this page, for reference purposes)|
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